| | vinyl-cache/vmod/vmod_math.c |
|---|
| 0 |
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/* this code is auto-generated. Do not edit */ |
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#include "config.h" |
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#include <float.h> |
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#include <math.h> |
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#include "vdef.h" |
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#include "vas.h" |
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#include "vrt.h" |
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#include "vcc_math_if.h" |
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// macros in math.h code are generic-ish across float/double/long double |
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//lint --e{506} Constant value Boolean |
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//lint --e{736} Loss of precision |
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VCL_REAL |
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vmod_constant(VRT_CTX, VCL_ENUM name) |
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{ |
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(void)ctx; |
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|
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if (name == VENUM(DBL_MANT_DIG)) return (DBL_MANT_DIG); |
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|
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if (name == VENUM(DBL_DIG)) return (DBL_DIG); |
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if (name == VENUM(DBL_MIN_EXP)) return (DBL_MIN_EXP); |
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if (name == VENUM(DBL_MIN_10_EXP)) return (DBL_MIN_10_EXP); |
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if (name == VENUM(DBL_MAX_EXP)) return (DBL_MAX_EXP); |
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if (name == VENUM(DBL_MAX_10_EXP)) return (DBL_MAX_10_EXP); |
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if (name == VENUM(DBL_MAX)) return (DBL_MAX); |
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if (name == VENUM(DBL_EPSILON)) return (DBL_EPSILON); |
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|
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if (name == VENUM(DBL_MIN)) return (DBL_MIN); |
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|
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if (name == VENUM(HUGE_VAL)) return (HUGE_VAL); |
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if (name == VENUM(M_E)) return (M_E); |
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if (name == VENUM(M_LOG2E)) return (M_LOG2E); |
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|
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if (name == VENUM(M_LOG10E)) return (M_LOG10E); |
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if (name == VENUM(M_LN2)) return (M_LN2); |
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if (name == VENUM(M_LN10)) return (M_LN10); |
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if (name == VENUM(M_PI)) return (M_PI); |
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|
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0 |
if (name == VENUM(M_PI_2)) return (M_PI_2); |
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|
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0 |
if (name == VENUM(M_PI_4)) return (M_PI_4); |
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if (name == VENUM(M_1_PI)) return (M_1_PI); |
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if (name == VENUM(M_2_PI)) return (M_2_PI); |
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if (name == VENUM(M_2_SQRTPI)) return (M_2_SQRTPI); |
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if (name == VENUM(M_SQRT2)) return (M_SQRT2); |
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if (name == VENUM(M_SQRT1_2)) return (M_SQRT1_2); |
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WRONG("constant enum"); |
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} |
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VCL_INT |
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vmod_fpclass(VRT_CTX, VCL_ENUM name) |
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{ |
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(void)ctx; |
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if (name == VENUM(FP_INFINITE)) return (FP_INFINITE); |
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if (name == VENUM(FP_NAN)) return (FP_NAN); |
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if (name == VENUM(FP_NORMAL)) return (FP_NORMAL); |
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if (name == VENUM(FP_SUBNORMAL)) return (FP_SUBNORMAL); |
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if (name == VENUM(FP_ZERO)) return (FP_ZERO); |
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|
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WRONG("fpclass enum"); |
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} |
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VCL_INT |
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vmod_fpclassify(VRT_CTX, VCL_REAL x) |
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{ |
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(void)ctx; |
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return (fpclassify(x)); |
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} |
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VCL_INT |
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vmod_isfinite(VRT_CTX, VCL_REAL x) |
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{ |
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(void)ctx; |
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return (isfinite(x)); |
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} |
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|
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VCL_INT |
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4 |
vmod_isgreater(VRT_CTX, VCL_REAL x, VCL_REAL y) |
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{ |
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(void)ctx; |
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return (isgreater(x, y)); |
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} |
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|
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VCL_INT |
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vmod_isgreaterequal(VRT_CTX, VCL_REAL x, VCL_REAL y) |
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{ |
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(void)ctx; |
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return (isgreaterequal(x, y)); |
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} |
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|
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VCL_INT |
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4 |
vmod_isinf(VRT_CTX, VCL_REAL x) |
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{ |
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(void)ctx; |
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4 |
return (isinf(x)); |
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} |
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|
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VCL_INT |
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4 |
vmod_isless(VRT_CTX, VCL_REAL x, VCL_REAL y) |
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{ |
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(void)ctx; |
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return (isless(x, y)); |
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} |
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|
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VCL_INT |
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4 |
vmod_islessequal(VRT_CTX, VCL_REAL x, VCL_REAL y) |
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{ |
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(void)ctx; |
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return (islessequal(x, y)); |
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} |
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|
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VCL_INT |
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4 |
vmod_islessgreater(VRT_CTX, VCL_REAL x, VCL_REAL y) |
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{ |
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(void)ctx; |
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return (islessgreater(x, y)); |
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} |
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|
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VCL_INT |
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4 |
vmod_isnan(VRT_CTX, VCL_REAL x) |
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{ |
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(void)ctx; |
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return (isnan(x)); |
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} |
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|
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VCL_INT |
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4 |
vmod_isnormal(VRT_CTX, VCL_REAL x) |
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{ |
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(void)ctx; |
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return (isnormal(x)); |
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} |
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|
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VCL_INT |
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4 |
vmod_isunordered(VRT_CTX, VCL_REAL x, VCL_REAL y) |
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{ |
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(void)ctx; |
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return (isunordered(x, y)); |
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} |
| 164 |
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|
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VCL_INT |
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4 |
vmod_signbit(VRT_CTX, VCL_REAL x) |
| 167 |
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{ |
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4 |
(void)ctx; |
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4 |
return (signbit(x)); |
| 170 |
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} |
| 171 |
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|
| 172 |
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VCL_REAL |
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4 |
vmod_acos(VRT_CTX, VCL_REAL x) |
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{ |
| 175 |
4 |
(void)ctx; |
| 176 |
4 |
return (acos(x)); |
| 177 |
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} |
| 178 |
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|
| 179 |
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VCL_REAL |
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4 |
vmod_acosh(VRT_CTX, VCL_REAL x) |
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{ |
| 182 |
4 |
(void)ctx; |
| 183 |
4 |
return (acosh(x)); |
| 184 |
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} |
| 185 |
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|
| 186 |
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VCL_REAL |
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4 |
vmod_asin(VRT_CTX, VCL_REAL x) |
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{ |
| 189 |
4 |
(void)ctx; |
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4 |
return (asin(x)); |
| 191 |
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} |
| 192 |
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|
| 193 |
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VCL_REAL |
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4 |
vmod_asinh(VRT_CTX, VCL_REAL x) |
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{ |
| 196 |
4 |
(void)ctx; |
| 197 |
4 |
return (asinh(x)); |
| 198 |
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} |
| 199 |
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|
| 200 |
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VCL_REAL |
| 201 |
4 |
vmod_atan(VRT_CTX, VCL_REAL x) |
| 202 |
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{ |
| 203 |
4 |
(void)ctx; |
| 204 |
4 |
return (atan(x)); |
| 205 |
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} |
| 206 |
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|
| 207 |
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VCL_REAL |
| 208 |
4 |
vmod_atan2(VRT_CTX, VCL_REAL y, VCL_REAL x) |
| 209 |
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{ |
| 210 |
4 |
(void)ctx; |
| 211 |
4 |
return (atan2(y, x)); |
| 212 |
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} |
| 213 |
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|
| 214 |
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VCL_REAL |
| 215 |
4 |
vmod_atanh(VRT_CTX, VCL_REAL x) |
| 216 |
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{ |
| 217 |
4 |
(void)ctx; |
| 218 |
4 |
return (atanh(x)); |
| 219 |
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} |
| 220 |
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|
| 221 |
|
VCL_REAL |
| 222 |
4 |
vmod_cbrt(VRT_CTX, VCL_REAL x) |
| 223 |
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{ |
| 224 |
4 |
(void)ctx; |
| 225 |
4 |
return (cbrt(x)); |
| 226 |
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} |
| 227 |
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|
| 228 |
|
VCL_REAL |
| 229 |
4 |
vmod_ceil(VRT_CTX, VCL_REAL x) |
| 230 |
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{ |
| 231 |
4 |
(void)ctx; |
| 232 |
4 |
return (ceil(x)); |
| 233 |
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} |
| 234 |
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|
| 235 |
|
VCL_REAL |
| 236 |
4 |
vmod_copysign(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 237 |
|
{ |
| 238 |
4 |
(void)ctx; |
| 239 |
4 |
return (copysign(x, y)); |
| 240 |
|
} |
| 241 |
|
|
| 242 |
|
VCL_REAL |
| 243 |
4 |
vmod_cos(VRT_CTX, VCL_REAL x) |
| 244 |
|
{ |
| 245 |
4 |
(void)ctx; |
| 246 |
4 |
return (cos(x)); |
| 247 |
|
} |
| 248 |
|
|
| 249 |
|
VCL_REAL |
| 250 |
4 |
vmod_cosh(VRT_CTX, VCL_REAL x) |
| 251 |
|
{ |
| 252 |
4 |
(void)ctx; |
| 253 |
4 |
return (cosh(x)); |
| 254 |
|
} |
| 255 |
|
|
| 256 |
|
VCL_REAL |
| 257 |
4 |
vmod_erf(VRT_CTX, VCL_REAL x) |
| 258 |
|
{ |
| 259 |
4 |
(void)ctx; |
| 260 |
4 |
return (erf(x)); |
| 261 |
|
} |
| 262 |
|
|
| 263 |
|
VCL_REAL |
| 264 |
4 |
vmod_erfc(VRT_CTX, VCL_REAL x) |
| 265 |
|
{ |
| 266 |
4 |
(void)ctx; |
| 267 |
4 |
return (erfc(x)); |
| 268 |
|
} |
| 269 |
|
|
| 270 |
|
VCL_REAL |
| 271 |
4 |
vmod_exp(VRT_CTX, VCL_REAL x) |
| 272 |
|
{ |
| 273 |
4 |
(void)ctx; |
| 274 |
4 |
return (exp(x)); |
| 275 |
|
} |
| 276 |
|
|
| 277 |
|
VCL_REAL |
| 278 |
4 |
vmod_exp2(VRT_CTX, VCL_REAL x) |
| 279 |
|
{ |
| 280 |
4 |
(void)ctx; |
| 281 |
4 |
return (exp2(x)); |
| 282 |
|
} |
| 283 |
|
|
| 284 |
|
VCL_REAL |
| 285 |
4 |
vmod_expm1(VRT_CTX, VCL_REAL x) |
| 286 |
|
{ |
| 287 |
4 |
(void)ctx; |
| 288 |
4 |
return (expm1(x)); |
| 289 |
|
} |
| 290 |
|
|
| 291 |
|
VCL_REAL |
| 292 |
4 |
vmod_fabs(VRT_CTX, VCL_REAL x) |
| 293 |
|
{ |
| 294 |
4 |
(void)ctx; |
| 295 |
4 |
return (fabs(x)); |
| 296 |
|
} |
| 297 |
|
|
| 298 |
|
VCL_REAL |
| 299 |
4 |
vmod_fdim(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 300 |
|
{ |
| 301 |
4 |
(void)ctx; |
| 302 |
4 |
return (fdim(x, y)); |
| 303 |
|
} |
| 304 |
|
|
| 305 |
|
VCL_REAL |
| 306 |
4 |
vmod_floor(VRT_CTX, VCL_REAL x) |
| 307 |
|
{ |
| 308 |
4 |
(void)ctx; |
| 309 |
4 |
return (floor(x)); |
| 310 |
|
} |
| 311 |
|
|
| 312 |
|
VCL_REAL |
| 313 |
4 |
vmod_fma(VRT_CTX, VCL_REAL x, VCL_REAL y, VCL_REAL z) |
| 314 |
|
{ |
| 315 |
4 |
(void)ctx; |
| 316 |
4 |
return (fma(x, y, z)); |
| 317 |
|
} |
| 318 |
|
|
| 319 |
|
VCL_REAL |
| 320 |
4 |
vmod_fmax(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 321 |
|
{ |
| 322 |
4 |
(void)ctx; |
| 323 |
4 |
return (fmax(x, y)); |
| 324 |
|
} |
| 325 |
|
|
| 326 |
|
VCL_REAL |
| 327 |
4 |
vmod_fmin(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 328 |
|
{ |
| 329 |
4 |
(void)ctx; |
| 330 |
4 |
return (fmin(x, y)); |
| 331 |
|
} |
| 332 |
|
|
| 333 |
|
VCL_REAL |
| 334 |
4 |
vmod_fmod(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 335 |
|
{ |
| 336 |
4 |
(void)ctx; |
| 337 |
4 |
return (fmod(x, y)); |
| 338 |
|
} |
| 339 |
|
|
| 340 |
|
VCL_REAL |
| 341 |
4 |
vmod_hypot(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 342 |
|
{ |
| 343 |
4 |
(void)ctx; |
| 344 |
4 |
return (hypot(x, y)); |
| 345 |
|
} |
| 346 |
|
|
| 347 |
|
VCL_INT |
| 348 |
4 |
vmod_ilogb(VRT_CTX, VCL_REAL x) |
| 349 |
|
{ |
| 350 |
4 |
(void)ctx; |
| 351 |
4 |
return (ilogb(x)); |
| 352 |
|
} |
| 353 |
|
|
| 354 |
|
VCL_REAL |
| 355 |
4 |
vmod_j0(VRT_CTX, VCL_REAL x) |
| 356 |
|
{ |
| 357 |
4 |
(void)ctx; |
| 358 |
4 |
return (j0(x)); |
| 359 |
|
} |
| 360 |
|
|
| 361 |
|
VCL_REAL |
| 362 |
4 |
vmod_j1(VRT_CTX, VCL_REAL x) |
| 363 |
|
{ |
| 364 |
4 |
(void)ctx; |
| 365 |
4 |
return (j1(x)); |
| 366 |
|
} |
| 367 |
|
|
| 368 |
|
VCL_REAL |
| 369 |
4 |
vmod_jn(VRT_CTX, VCL_INT x, VCL_REAL y) |
| 370 |
|
{ |
| 371 |
4 |
(void)ctx; |
| 372 |
4 |
return (jn(x, y)); |
| 373 |
|
} |
| 374 |
|
|
| 375 |
|
VCL_REAL |
| 376 |
4 |
vmod_ldexp(VRT_CTX, VCL_REAL x, VCL_INT e) |
| 377 |
|
{ |
| 378 |
4 |
(void)ctx; |
| 379 |
4 |
return (ldexp(x, e)); |
| 380 |
|
} |
| 381 |
|
|
| 382 |
|
VCL_REAL |
| 383 |
4 |
vmod_lgamma(VRT_CTX, VCL_REAL x) |
| 384 |
|
{ |
| 385 |
4 |
(void)ctx; |
| 386 |
4 |
return (lgamma(x)); |
| 387 |
|
} |
| 388 |
|
|
| 389 |
|
VCL_REAL |
| 390 |
4 |
vmod_log(VRT_CTX, VCL_REAL x) |
| 391 |
|
{ |
| 392 |
4 |
(void)ctx; |
| 393 |
4 |
return (log(x)); |
| 394 |
|
} |
| 395 |
|
|
| 396 |
|
VCL_REAL |
| 397 |
4 |
vmod_log10(VRT_CTX, VCL_REAL x) |
| 398 |
|
{ |
| 399 |
4 |
(void)ctx; |
| 400 |
4 |
return (log10(x)); |
| 401 |
|
} |
| 402 |
|
|
| 403 |
|
VCL_REAL |
| 404 |
4 |
vmod_log1p(VRT_CTX, VCL_REAL x) |
| 405 |
|
{ |
| 406 |
4 |
(void)ctx; |
| 407 |
4 |
return (log1p(x)); |
| 408 |
|
} |
| 409 |
|
|
| 410 |
|
VCL_REAL |
| 411 |
4 |
vmod_log2(VRT_CTX, VCL_REAL x) |
| 412 |
|
{ |
| 413 |
4 |
(void)ctx; |
| 414 |
4 |
return (log2(x)); |
| 415 |
|
} |
| 416 |
|
|
| 417 |
|
VCL_REAL |
| 418 |
4 |
vmod_logb(VRT_CTX, VCL_REAL x) |
| 419 |
|
{ |
| 420 |
4 |
(void)ctx; |
| 421 |
4 |
return (logb(x)); |
| 422 |
|
} |
| 423 |
|
|
| 424 |
|
VCL_INT |
| 425 |
4 |
vmod_lrint(VRT_CTX, VCL_REAL x) |
| 426 |
|
{ |
| 427 |
4 |
(void)ctx; |
| 428 |
4 |
return (lrint(x)); |
| 429 |
|
} |
| 430 |
|
|
| 431 |
|
VCL_INT |
| 432 |
4 |
vmod_lround(VRT_CTX, VCL_REAL x) |
| 433 |
|
{ |
| 434 |
4 |
(void)ctx; |
| 435 |
4 |
return (lround(x)); |
| 436 |
|
} |
| 437 |
|
|
| 438 |
|
VCL_REAL |
| 439 |
4 |
vmod_nan(VRT_CTX, VCL_STRING tag) |
| 440 |
|
{ |
| 441 |
4 |
(void)ctx; |
| 442 |
4 |
return (nan(tag)); |
| 443 |
|
} |
| 444 |
|
|
| 445 |
|
VCL_REAL |
| 446 |
4 |
vmod_nearbyint(VRT_CTX, VCL_REAL x) |
| 447 |
|
{ |
| 448 |
4 |
(void)ctx; |
| 449 |
4 |
return (nearbyint(x)); |
| 450 |
|
} |
| 451 |
|
|
| 452 |
|
VCL_REAL |
| 453 |
4 |
vmod_nextafter(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 454 |
|
{ |
| 455 |
4 |
(void)ctx; |
| 456 |
4 |
return (nextafter(x, y)); |
| 457 |
|
} |
| 458 |
|
|
| 459 |
|
VCL_REAL |
| 460 |
4 |
vmod_pow(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 461 |
|
{ |
| 462 |
4 |
(void)ctx; |
| 463 |
4 |
return (pow(x, y)); |
| 464 |
|
} |
| 465 |
|
|
| 466 |
|
VCL_REAL |
| 467 |
4 |
vmod_remainder(VRT_CTX, VCL_REAL x, VCL_REAL y) |
| 468 |
|
{ |
| 469 |
4 |
(void)ctx; |
| 470 |
4 |
return (remainder(x, y)); |
| 471 |
|
} |
| 472 |
|
|
| 473 |
|
VCL_REAL |
| 474 |
4 |
vmod_rint(VRT_CTX, VCL_REAL x) |
| 475 |
|
{ |
| 476 |
4 |
(void)ctx; |
| 477 |
4 |
return (rint(x)); |
| 478 |
|
} |
| 479 |
|
|
| 480 |
|
VCL_REAL |
| 481 |
4 |
vmod_round(VRT_CTX, VCL_REAL x) |
| 482 |
|
{ |
| 483 |
4 |
(void)ctx; |
| 484 |
4 |
return (round(x)); |
| 485 |
|
} |
| 486 |
|
|
| 487 |
|
VCL_REAL |
| 488 |
4 |
vmod_scalbln(VRT_CTX, VCL_REAL x, VCL_INT e) |
| 489 |
|
{ |
| 490 |
4 |
(void)ctx; |
| 491 |
4 |
return (scalbln(x, e)); |
| 492 |
|
} |
| 493 |
|
|
| 494 |
|
VCL_REAL |
| 495 |
4 |
vmod_scalbn(VRT_CTX, VCL_REAL x, VCL_INT y) |
| 496 |
|
{ |
| 497 |
4 |
(void)ctx; |
| 498 |
4 |
return (scalbn(x, y)); |
| 499 |
|
} |
| 500 |
|
|
| 501 |
|
VCL_REAL |
| 502 |
24 |
vmod_sin(VRT_CTX, VCL_REAL x) |
| 503 |
|
{ |
| 504 |
24 |
(void)ctx; |
| 505 |
24 |
return (sin(x)); |
| 506 |
|
} |
| 507 |
|
|
| 508 |
|
VCL_REAL |
| 509 |
4 |
vmod_sinh(VRT_CTX, VCL_REAL x) |
| 510 |
|
{ |
| 511 |
4 |
(void)ctx; |
| 512 |
4 |
return (sinh(x)); |
| 513 |
|
} |
| 514 |
|
|
| 515 |
|
VCL_REAL |
| 516 |
4 |
vmod_sqrt(VRT_CTX, VCL_REAL x) |
| 517 |
|
{ |
| 518 |
4 |
(void)ctx; |
| 519 |
4 |
return (sqrt(x)); |
| 520 |
|
} |
| 521 |
|
|
| 522 |
|
VCL_REAL |
| 523 |
4 |
vmod_tan(VRT_CTX, VCL_REAL x) |
| 524 |
|
{ |
| 525 |
4 |
(void)ctx; |
| 526 |
4 |
return (tan(x)); |
| 527 |
|
} |
| 528 |
|
|
| 529 |
|
VCL_REAL |
| 530 |
4 |
vmod_tanh(VRT_CTX, VCL_REAL x) |
| 531 |
|
{ |
| 532 |
4 |
(void)ctx; |
| 533 |
4 |
return (tanh(x)); |
| 534 |
|
} |
| 535 |
|
|
| 536 |
|
VCL_REAL |
| 537 |
4 |
vmod_tgamma(VRT_CTX, VCL_REAL x) |
| 538 |
|
{ |
| 539 |
4 |
(void)ctx; |
| 540 |
4 |
return (tgamma(x)); |
| 541 |
|
} |
| 542 |
|
|
| 543 |
|
VCL_REAL |
| 544 |
4 |
vmod_trunc(VRT_CTX, VCL_REAL x) |
| 545 |
|
{ |
| 546 |
4 |
(void)ctx; |
| 547 |
4 |
return (trunc(x)); |
| 548 |
|
} |
| 549 |
|
|
| 550 |
|
VCL_REAL |
| 551 |
4 |
vmod_y0(VRT_CTX, VCL_REAL x) |
| 552 |
|
{ |
| 553 |
4 |
(void)ctx; |
| 554 |
4 |
return (y0(x)); |
| 555 |
|
} |
| 556 |
|
|
| 557 |
|
VCL_REAL |
| 558 |
4 |
vmod_y1(VRT_CTX, VCL_REAL x) |
| 559 |
|
{ |
| 560 |
4 |
(void)ctx; |
| 561 |
4 |
return (y1(x)); |
| 562 |
|
} |
| 563 |
|
|
| 564 |
|
VCL_REAL |
| 565 |
4 |
vmod_yn(VRT_CTX, VCL_INT n, VCL_REAL x) |
| 566 |
|
{ |
| 567 |
4 |
(void)ctx; |
| 568 |
4 |
return (yn(n, x)); |
| 569 |
|
} |
| 570 |
|
|
| 571 |
|
VCL_BOOL |
| 572 |
4 |
vmod_code_coverage(VRT_CTX, VCL_REAL x) |
| 573 |
|
{ |
| 574 |
4 |
double a = 0.; |
| 575 |
4 |
a += vmod_fpclassify(ctx, x/113.); |
| 576 |
4 |
a += vmod_isfinite(ctx, x/113.); |
| 577 |
4 |
a += vmod_isgreater(ctx, x/113., x/355.); |
| 578 |
4 |
a += vmod_isgreaterequal(ctx, x/113., x/355.); |
| 579 |
4 |
a += vmod_isinf(ctx, x/113.); |
| 580 |
4 |
a += vmod_isless(ctx, x/113., x/355.); |
| 581 |
4 |
a += vmod_islessequal(ctx, x/113., x/355.); |
| 582 |
4 |
a += vmod_islessgreater(ctx, x/113., x/355.); |
| 583 |
4 |
a += vmod_isnan(ctx, x/113.); |
| 584 |
4 |
a += vmod_isnormal(ctx, x/113.); |
| 585 |
4 |
a += vmod_isunordered(ctx, x/113., x/355.); |
| 586 |
4 |
a += vmod_signbit(ctx, x/113.); |
| 587 |
4 |
a += vmod_acos(ctx, x/113.); |
| 588 |
4 |
a += vmod_acosh(ctx, x/113.); |
| 589 |
4 |
a += vmod_asin(ctx, x/113.); |
| 590 |
4 |
a += vmod_asinh(ctx, x/113.); |
| 591 |
4 |
a += vmod_atan(ctx, x/113.); |
| 592 |
4 |
a += vmod_atan2(ctx, x/113., x/113.); |
| 593 |
4 |
a += vmod_atanh(ctx, x/113.); |
| 594 |
4 |
a += vmod_cbrt(ctx, x/113.); |
| 595 |
4 |
a += vmod_ceil(ctx, x/113.); |
| 596 |
4 |
a += vmod_copysign(ctx, x/113., x/113.); |
| 597 |
4 |
a += vmod_cos(ctx, x/113.); |
| 598 |
4 |
a += vmod_cosh(ctx, x/113.); |
| 599 |
4 |
a += vmod_erf(ctx, x/113.); |
| 600 |
4 |
a += vmod_erfc(ctx, x/113.); |
| 601 |
4 |
a += vmod_exp(ctx, x/113.); |
| 602 |
4 |
a += vmod_exp2(ctx, x/113.); |
| 603 |
4 |
a += vmod_expm1(ctx, x/113.); |
| 604 |
4 |
a += vmod_fabs(ctx, x/113.); |
| 605 |
4 |
a += vmod_fdim(ctx, x/113., x/113.); |
| 606 |
4 |
a += vmod_floor(ctx, x/113.); |
| 607 |
4 |
a += vmod_fma(ctx, x/113., x/113., x/113.); |
| 608 |
4 |
a += vmod_fmax(ctx, x/113., x/113.); |
| 609 |
4 |
a += vmod_fmin(ctx, x/113., x/113.); |
| 610 |
4 |
a += vmod_fmod(ctx, x/113., x/113.); |
| 611 |
4 |
a += vmod_hypot(ctx, x/113., x/113.); |
| 612 |
4 |
a += vmod_ilogb(ctx, x/113.); |
| 613 |
4 |
a += vmod_j0(ctx, x/113.); |
| 614 |
4 |
a += vmod_j1(ctx, x/113.); |
| 615 |
4 |
a += vmod_jn(ctx, 12, x/113.); |
| 616 |
4 |
a += vmod_ldexp(ctx, x/113., 12); |
| 617 |
4 |
a += vmod_lgamma(ctx, x/113.); |
| 618 |
4 |
a += vmod_log(ctx, x/113.); |
| 619 |
4 |
a += vmod_log10(ctx, x/113.); |
| 620 |
4 |
a += vmod_log1p(ctx, x/113.); |
| 621 |
4 |
a += vmod_log2(ctx, x/113.); |
| 622 |
4 |
a += vmod_logb(ctx, x/113.); |
| 623 |
4 |
a += vmod_lrint(ctx, x/113.); |
| 624 |
4 |
a += vmod_lround(ctx, x/113.); |
| 625 |
4 |
a += vmod_nan(ctx, "0x3141"); |
| 626 |
4 |
a += vmod_nearbyint(ctx, x/113.); |
| 627 |
4 |
a += vmod_nextafter(ctx, x/113., x/113.); |
| 628 |
4 |
a += vmod_pow(ctx, x/113., x/113.); |
| 629 |
4 |
a += vmod_remainder(ctx, x/113., x/113.); |
| 630 |
4 |
a += vmod_rint(ctx, x/113.); |
| 631 |
4 |
a += vmod_round(ctx, x/113.); |
| 632 |
4 |
a += vmod_scalbln(ctx, x/113., 24L); |
| 633 |
4 |
a += vmod_scalbn(ctx, x/113., 12); |
| 634 |
4 |
a += vmod_sin(ctx, x/113.); |
| 635 |
4 |
a += vmod_sinh(ctx, x/113.); |
| 636 |
4 |
a += vmod_sqrt(ctx, x/113.); |
| 637 |
4 |
a += vmod_tan(ctx, x/113.); |
| 638 |
4 |
a += vmod_tanh(ctx, x/113.); |
| 639 |
4 |
a += vmod_tgamma(ctx, x/113.); |
| 640 |
4 |
a += vmod_trunc(ctx, x/113.); |
| 641 |
4 |
a += vmod_y0(ctx, x/113.); |
| 642 |
4 |
a += vmod_y1(ctx, x/113.); |
| 643 |
4 |
a += vmod_yn(ctx, 12, x/113.); |
| 644 |
4 |
return (isnan(a)); |
| 645 |
|
} |